Fog Acceleration through Reconfigurable Devices

In the last few years we saw an increased interest in heterogeneous and reconfigurable platforms like FPGAs, thanks to their flexibility w.r.t. custom ASICs and performance w.r.t. common CPUs when taking into account specific tasks. If we focus on Internet of Things (IoT) devices and networks, FPGA boards can be leveraged as fog nodes to decentralize the workload and delegate tasks to the edges of a network, collecting in the Cloud only pre-processed data to reduce bandwidth. In this paper we propose Fog Acceleration through Reconfigurable Devices (FARD), which is a cluster of heterogeneous boards (CPU + FPGA) able to improve performance/Watt ratio, scalability and flexibility in scenarios that exploit fog computing. To this aim, in this paper we provide an accelerated fog application that leverages FARD to monitor car flows with video surveillance cameras. The proposed application leverages the PYNQ-Z1 1 platform, outperforming the software implementation running on an Intel core i7 by 3.75x in terms of execution time per frame and of 33.98x in terms of FPS/Watt

Parallel protein identification using an FPGA-based solution

The ability to rapidly identify a given protein from small subsamples (i.e. peptides) is at the basis of fundamental applications in the medical field. At the basis of protein identification we have a string matching problem which is computational intensive if we consider that the complexity of the algorithm scales with the length of the string and the number of sweeps of the database that are needed. In this paper we present an improvement for the FPGA-based string matching solution available in the literature improving the amount of parallelism exploited by the solution achieving a 1.63× reduction of the energy needed for the task over the literature and a 5.75× reduction when compared with high-end workstation